时钟数据恢复,Clock and data recovery英语短句,例句大全

时钟数据恢复,Clock and data recovery
1)Clock and data recovery时钟数据恢复
1.The receiver employs two 1:20 deserializers,an input signal pre-amplifier and clock and data recovery circuit.接收器还包含了时钟数据恢复电路,其中的相位插值器通过改进编码方式,使得输出信号的幅度能够保持恒定,并且相位具有良好的线性度。
2.This paper describes a clock and data recovery(CDR)circuit for RFID tag, and a new phase frequency detector(PFD) is proposed for this CDR circuit for NRZ data.提出了一种适用于射频电子标签的时钟数据恢复电路,在电路中提出了一种适用于NRZ数据的新型鉴频鉴相器电路和自适应控制单元,能动态调节边沿检测器中延迟单元的延迟时间,使此时钟数据恢复电路具有大的锁定范围,且有结构简单易实现的特点。
3.In serial data communication domain,clock and data recovery(CDR) using oversampling is a low-cost "fast retiming" technique that can be implemented as monolithic circuits using the standard digital CMOS process.文中经过理论分析给出了一个基于过采样技术的时钟数据恢复电路(CDR)设计。

英文短句/例句

1.Design of Phase-locked Loop for USB2.0 Application;应用于USB2.0时钟数据恢复的锁相环设计
2.Design of 2.5GHz Full Speed Clock and Data Recovery Circuit2.5GHz全速率时钟数据恢复电路的设计
3.The Design and Realization of Clock and Data Recovery of Burst Mode突发模式时钟数据恢复的研究与实现
4.A clock and data recovery method based on phase detector implemented by delay chain in FPGA利用FPGA延时链实现鉴相器时钟数据恢复
5.Design and Implementation of a 2.5Gbps Clock Data Recovery Circuit for PCI Express;PCI Express中的2.5Gbps时钟数据恢复电路的设计与实现
6.Design and Implementation of a High Performance Clock and Date Recovery Circuit高性能时钟数据恢复电路的设计与实现
7.Design of high-speed clock and data recovery circuit Based on FPGA基于FPGA的高速时钟数据恢复电路的实现
8.Design and implementation of a 54Mb/s NRZ clock data recovery circuit54Mb/s NRZ时钟数据恢复电路的设计与实现
9.A 1.25Gb/s Clock and Data Recovery Circuit Used in Gigabit Ethernet;用于1.25Gb/s千兆以太网的时钟数据恢复电路的设计
10.Design and Implementation of a 2.5Gbps Clock Data Recovery Circuit for PCI Express应用于PCI-Express的2.5Gbps时钟数据恢复电路的设计与实现
11.System clock recover is the key in digital TV system.系统时钟恢复是数字电视系统设计中的难点。
12.The Researching of Transaction Scheduling and Data Recovery in Real-time Main Memory Database System;实时内存数据库的事务调度与数据恢复研究
13.The database can not be recovered because the files have been restored to inconsistent points in time.无法恢复数据库，因为已将文件恢复到了不一致的即时点上。
14.Researching and Application about Storage Structure of SQL Server 2000 DatabaseSQL Server2000数据库文件的恢复
15.A characteristic of becoming lost or erased when power is removed, i. e., the loss of data.一种特性，指断电时数据丢失而不可再恢复。
16.The Design of Recovery Subsystem of Embedded Real Time DBMS嵌入式实时内存数据库恢复子系统的设计
17.How to resume the data-base by using MDF file in the sql server when log files are missing;SQL Server中如何在日志文件丢失时恢复数据库
18.A New Automatic Recovery Strategy for Embedded Real-time Databases一种新的嵌入式实时数据库自动恢复策略

相关短句/例句

CDR时钟数据恢复
1.A high-speed and low-jitter CDR circuit for fiber-optic communications;光纤通信用低相位抖动时钟数据恢复电路
2.After comparing several CDR(Clock and Data Recovery) circuits,a new clock and data circuit based on the modified gated oscillator is proposed.在吉比特级EPON的突发式接收模块中,时钟数据恢复是关键技术之一。
3.Compared to the PLL, the input of CDR (Clock and Data Recovery) is high-speed random data, and the overall circuit works in a high speed input and high speed output status, all of this make the design of CDR difficult.与锁相环相比,时钟数据恢复电路(Clock Data Recovery,CDR)的输入为高速随机数据,并且全部电路都工作于高速状态,使得时钟数据恢复电路的设计变得非常复杂;同时,时钟数据恢复电路也是PCI Express中最关键的部分,其带宽直接决定了整个系统的性能。
3)clock data recovery时钟数据恢复
4)Clock and Data Recovery(CDR)时钟和数据恢复
5)dual-loop clock and data recovery双环时钟数据恢复
1.The principle with the quadrature reference clocks in dual-loop clock and data recovery circuit was described.描述了双环时钟数据恢复电路利用相位正交的参考时钟进行工作的原理,分析了传统的正交时钟产生方案,提出一种新的相位插值-选择方案并给出了CMOS电路实现。
6)parallel clock and data recovery并行时钟数据恢复
1.5Gbps/ch 2-channel parallel clock and data recovery circuit is designed and fabricated in TSMC s standard 0.5Gbps/ch并行时钟数据恢复电路。