时钟分频,clock division
1)clock division时钟分频
1.Frequency-tunable all-optical clock division using semiconductor laser subjected to external optical injection;外光注入半导体激光器实现重复速率可调全光时钟分频
2.This paper studied clock division phenomenon on SOA injection Mode-Locked Fiber Laser,and the focus of the injection repetition frequency of 5.对半导体光放大器(semiconductor optical amplifier:SOA)注入锁模光纤环激光器的时钟分频现象进行了实验研究,重点分析了注入重复频率为5。
3.The high-repetition rate optical pulses clock division is investigated based on the nonlinear dynamics of optically injected Fabry-Pérot semiconductor laser.16 GHz光脉冲输出的时钟分频现象,讨论了Fabry-Pérot半导体激光器的偏置电流、注入光功率、注入光光谱以及光谱线宽等因素对时钟分频的影响。
英文短句/例句

1.The Study of Clock Division of High Rate Optical Pulse Subject to Semiconductor Laser;基于半导体激光器实现高速光脉冲时钟分频的研究
2.The Realization of Division and Multichannel Output of High-Frequency Clock Using the FPGA;用FPGA实现高频时钟的分频和多路输出
3.Study on the Analysis Theories and Algorithms of the Time and Frequency Characterization for Atomic Clocks of Navigation Satellites;导航卫星原子钟时频特性分析理论与方法研究
4.A 10ps skew pure digital clock divider一种10ps以下时钟偏差的纯数字电路分频器设计
5.Frequency Measurement Method of Synchronization Clock Calibration in Distributed Testing System分布式测试系统同步时钟校准的频率测量方法
6.Analyses of Main Error Sources on Time-Domain Frequency Stability for Atomic Clocks of Navigation Satellites导航卫星原子钟时域频率稳定性影响因素分析
7.The clock points to ten minutes past midnight.时钟已指午夜过十分钟。
8.The Design of Divide Frequency Implement of Hydrogen Maser Based on the FPGA;基于FPGA的氢原子钟分频钟的设计
9.Analysis of clock jitter error in digital-to-analog converter based on Linear Frequency Modulated Signal基于线性调频信号的数模转换器时钟抖动误差分析
10.frequency master control instrument for synchronous clocks or time switches频率主控仪表,用于同步时钟或时开关
11.A period of30 minutes.半小时30分钟的时长
12.The hour hand in a clock is shorter than the minute hand.时钟的时针比分针短。
13.Decrease electron-magnetic radiation by using spread-spectrum-clock generation technique采用扩展频谱时钟技术降低电磁辐射
14.A Complex Multi-frequency Synthesis Technology Applied to Electromagnetic Detecting Source电磁探测场源的复杂多频点时钟设计
15.for a duration of ten minutes继续十分钟,十分钟的时间 (中)
16.Duration of the game is 90 minutes,each half 45 minutes.比赛时间是90分钟,每半场各45分钟。
17.The preparative times of preoperation were 25-35 minutes,average 31 minutes.术前准备时间25~35分钟,平均31分钟。
18.Helen arrived on the dot-not a minute early, not a minute late.海伦准时到达,一分钟不早,一分钟不晚。
相关短句/例句

clock divider时钟分频器
1.The circuits are consisted of latches,selectors and clock dividers.该电路主要由锁存器、选择器和时钟分频器3个模块组成,采用1。
3)external clock divider外时钟分频器
4)clock base frequency时钟基频
1.A new tool that can test the clock base frequency error of energy measuring devices and provide GPS standard time to calibrate real-time clock was introduced in this paper.介绍了一种用来测量电能计量装置的时钟基频误差,并提供GPS标准时间以校准其实时时钟的新型工具。
5)clock frequency时钟频率
1.This paper introduces A/D Converter ICL7135 Series Collection in Single-chip Microcomputer Voltage Meter,interface circuit and clock frequency of AT89C51 and ICL7135.介绍了双积分A/D转换器ICL7135与AT89C51进行串行数据采集的原理、接口电路的连接方法及时钟频率选择,并且通过实验数据及图形证明了该方法的可行性。
2.The relations among the error of frequency measurement, measure time, reference clock frequency and the measured signal frequency, are also deduced.本文针对计数式瞬时测频精度进行分析,提出了通过级数展开来估计测频误差的方法,其中应用了莱布尼兹定理对交错级数进行了取舍,推导出计数式瞬时测频中测频误差与观测时间、基准时钟频率及被测信号频率之间的关系。
3.Dynamic voltage scaling (DVS) technique is an effective way to reduce processor energy consumption through changing the processor’s supply voltage and clock frequency at the runtime.动态电压缩放技术是一种能有效优化处理器能耗的方法,它允许处理器在运行时动态地改变其时钟频率和供电电压。
6)clock frequency error(CFE)时钟频偏
1.The model between a switch under tested(SUT) and a Smartbits card is presented and used for two interconnecting switches,this paper presents that clock frequency error(CFE) between a SUT and a Smartbits card is a leading factor of forwarding delay in an ethernet switch.以测试交换机和Smartbits测试卡作为两个对接交换设备的模型,提出了时钟频偏是交换机转发时延的主要影响因素。
延伸阅读

分频将较高频率变为其整数分之一低频率的方法。早期采用混频法,后又采用张弛振荡与被分频率同步法,还可用锁相法。在高频技术中,可用隧道二极管分频。常用二进制触发器分频法,利用反馈可实现任意分数的分频。分频所得信号可保留原信号的稳定度。